Flip chip ball grid array (FCBGA) package is a type of semiconductor package having both the flip chip and ball grid array structure. In this type of package, at least one chip is electrically connected to one side of a substrate via a plurality of solder bumps, and a plurality of solder balls which act as input/output terminals are mounted on the other side of the substrate. A heat sink is usually provided in the foregoing package for dissipating heat generated from the chip during operation. For example, in U.S. Pat. Nos. 5,311,402 and 5,637,920, the heat sink is adhered onto the substrate via an adhesive or solder and often has a surface area larger than that of the chip, such that the heat sink disposed over the chip can effectively dissipate the heat from the chip. However, this structure yields significant drawbacks. The adhesion between the heat sink and the substrate may be degraded by undesirable cleanness of the bonding interface and the thermal stresses generated between the two, thereby leading to problems such as delamination between the heat sink and the substrate and detachment of the heat sink. External forces or shocks may also contribute to the detachment of heat sink. Moreover, the adhesion by means of the adhesive or solder is dependent on the effective bonding area or contact area between the heat sink and the substrate; however, it is undesirable to increase the bonding or contact area to improve the adhesion between the heat sink and the substrate in response to the trend of manufacturing smaller and lighter semiconductor packages.
Therefore, it has been disclosed to use a mechanical technique to mount the heat sink onto the substrate. In U.S. Pat. No. 5,907,474, a set of holes are formed in the heat sink at positions to be contact with the substrate, and another set of holes are formed in the substrate at positions corresponding to the holes of the heat sink, whereby fixing means such as screws can be coupled to corresponding pairs of the holes in the heat sink and substrate to thereby mechanically mount the heat sink on the substrate.
Most of the foregoing heat sinks are shaped to have recessed portions at central area thereof through the use of a half-etching or forge technique which is however complex and difficult to implement, thereby undesirably raising leading the fabrication costs.
Accordingly, U.S. Pat. No. 6,188,578 provides a stamping heat sink which is manufactured with relatively lower costs and simpler processes. As shown in FIG. 8, this stamping heat sink has a flat portion 80 to be disposed over the chip (not shown), a plurality of support portions 81 extending from edges of the flat portion 80 downwardly, and a laterally-extending contact portion 82 formed at the end of each support portion 81 to be in contact with the substrate (not shown).
However, when the above stamping heat sink is attached to the substrate via an adhesive or solder, the adhesion between the heat sink and the substrate may still be affected by the cleanness of bonding interface between the contact portions 82 and the substrate and by external forces or shocks. Besides, thermal stresses generated due to thermal mismatch between the contact portions 82 of the heat sink and the substrate may also lead to delamination between the heat sink and the substrate and more seriously the detachment of heat sink. Moreover, the bonding or contact area between the stamping heat sink and the substrate is decreased by virtue of the contact portions 82, which makes the heat sink further difficult to be firmly secured on the substrate in position.
In U.S. Pat. No. 6,376,907, as shown in FIG. 9, the heat sink similarly includes a flat portion 90 to be connected with the chip (not shown), and a peripheral bonding portion 91 extending downwardly and outwardly from the flat portion 90 to be in contact with the substrate (not shown). At the corners of the peripheral bonding portion 91 there are formed a plurality of openings 92 so as to alleviate the thermal stresses which may accumulate at the corners of the peripheral bonding portion 91.
If the peripheral bonding portion 91 of the heat sink, not having openings at the corners thereof, is directly attached to the substrate, due to mismatch in coefficient of thermal expansion (CTE) between the heat sink and the substrate, during subsequent reliability tests such as thermal cycling test (TCT), thermal shock test (TST), high temperature storage life test (HTST) and so on, the heat sink and the substrate would experience significant temperature changes and thus produce thermal stresses at bonding interface therebetween to thereby cause reliability issues. For examples, under an environment having an increasing temperature, the heat sink has a larger CTE and correspondingly generate greater deformation of thermal expansion than the substrate, thereby leading to thermal expansion stresses at the interface between the heat sink and the substrate. In a condition with a decreasing temperature, the heat sink having the larger CTE would generate greater deformation of thermal contraction than the substrate, resulting in thermal contraction stresses at the interface between the heat sink and the substrate. If these thermal stresses cannot be readily released, they would concentrate at area having uneven stress distribution such as the corners of the peripheral bonding portion 91, and undesirably facilitates the fatigue and structural damage of the bonding interface between the heat sink and the substrate at the corners of the peripheral bonding portion 91.
Therefore, the openings 92 formed at the corners of the peripheral bonding portion 91 of the heat sink allows the above-mentioned thermal stresses transmitted to the corners to be released through the openings 92, thereby helping solve the problem of the fatigue and structural damage of the bonding interface between the heat sink and the substrate at the corners of the peripheral bonding portion 91.
However, the provision of openings 92 at the corners of the bonding portion 91 still fails to remedy the deficiencies such as delamination at the interface between the heat sink and the substrate due to undesirable cleanness of the interface or external shocks. Moreover, the bonding portion 91 cannot effectively increase the bonding or contact area between the heat sink and the substrate, thereby difficult to improve the bonding strength between the heat sink and the substrate.
Therefore, the problem to be solved here is to provide a semiconductor package with a heat sink, which can overcome the above drawbacks and securely mount the heat sink on the substrate.